nanoll extt
Please use this identifier to cite or link to this item: http://lrcdrs.bennett.edu.in:80/handle/123456789/838
Title: TAM: A Front-End to an Auto-Parallelizing Compiler
Authors: Garg, Deepak
Keywords: Parallelization
Compiler
Optimization
CPU utilization
Multiprocessor
Issue Date: 2022
Publisher: ACM Trans
Abstract: The multi-core architecture has revolutionized the parallel computing. Despite this, the modern age compilers have a long way to achieve auto-parallelization. Through this paper, we introduce a language that encouraging the auto-parallelization. We are also introducing Front-End for our auto-parallelizing compiler. Later, we examined our compiler employing a diferent number of core and verify results based on diferent metrics based on total compilation time, memory utilization, power utilization and CPU utilization. At last, we learned that parallelizing multiple iles engage more CPU resources, memory and energy, but it inishes the task at hand in less time. In this paper, we have proposed a loop code generation technique that makes the generation of nested loop IR code faster by dividing the blocks into some extra code blocks using a modular approach. Our TAM compiler technique speedup by 7.506, 5.283 and 2.509 against sequential compilation when we utilized 8, 4 and 2 cores respectively. We observed that the CPU utilization of the TAM compiler reaches the maximum permissible limit when an optimal parallelizable instance is compiled.
URI: https://doi.org/10.1145/3543510
http://lrcdrs.bennett.edu.in:80/handle/123456789/838
ISSN: 2375-4699
Appears in Collections:Journal Articles_SCSET

Files in This Item:
File Description SizeFormat 
TAM A Front-End to an Auto-Parallelizing Compiler.pdf
  Restricted Access
1.24 MBAdobe PDFView/Open Request a copy

Contact admin for Full-Text

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.