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Please use this identifier to cite or link to this item: http://lrcdrs.bennett.edu.in:80/handle/123456789/838
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dc.contributor.authorGarg, Deepak-
dc.date.accessioned2023-04-03T03:32:48Z-
dc.date.available2023-04-03T03:32:48Z-
dc.date.issued2022-
dc.identifier.issn2375-4699-
dc.identifier.urihttps://doi.org/10.1145/3543510-
dc.identifier.urihttp://lrcdrs.bennett.edu.in:80/handle/123456789/838-
dc.description.abstractThe multi-core architecture has revolutionized the parallel computing. Despite this, the modern age compilers have a long way to achieve auto-parallelization. Through this paper, we introduce a language that encouraging the auto-parallelization. We are also introducing Front-End for our auto-parallelizing compiler. Later, we examined our compiler employing a diferent number of core and verify results based on diferent metrics based on total compilation time, memory utilization, power utilization and CPU utilization. At last, we learned that parallelizing multiple iles engage more CPU resources, memory and energy, but it inishes the task at hand in less time. In this paper, we have proposed a loop code generation technique that makes the generation of nested loop IR code faster by dividing the blocks into some extra code blocks using a modular approach. Our TAM compiler technique speedup by 7.506, 5.283 and 2.509 against sequential compilation when we utilized 8, 4 and 2 cores respectively. We observed that the CPU utilization of the TAM compiler reaches the maximum permissible limit when an optimal parallelizable instance is compiled.en_US
dc.publisherACM Transen_US
dc.subjectParallelizationen_US
dc.subjectCompileren_US
dc.subjectOptimizationen_US
dc.subjectCPU utilizationen_US
dc.subjectMultiprocessoren_US
dc.titleTAM: A Front-End to an Auto-Parallelizing Compileren_US
dc.typeArticleen_US
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