nanoll extt
Please use this identifier to cite or link to this item: http://lrcdrs.bennett.edu.in:80/handle/123456789/957
Full metadata record
DC FieldValueLanguage
dc.contributor.authorMishra, Vipul Kumar-
dc.date.accessioned2023-04-03T05:00:46Z-
dc.date.available2023-04-03T05:00:46Z-
dc.date.issued2020-11-
dc.identifier.issn2166-6814-
dc.identifier.urihttp://doi.org/10.1109/ICCE-Berlin50680.2020.9352192-
dc.identifier.urihttp://lrcdrs.bennett.edu.in:80/handle/123456789/957-
dc.descriptionhttps://ieeexplore.ieee.org/xpl/conhome/9352056/proceedingen_US
dc.description.abstractDigital signal processor (DSP) intellectual property (IP) cores are the underlying hardware responsible for high performance data intensive applications. However an unauthorized IP vendor may counterfeit the DSP IPs and infuse them into the design-chain. Thus fake IPs or integrated circuits (ICs) are unknowingly integrated into consumer electronics (CE) systems, leading to reliability and safety issues for users. The latent solution to this threat is hardware steganography wherein vendor's secret information is covertly inserted into the design to enable detection of counterfeiting. A key-regulated hash-modules chaining based IP steganography is presented in our paper to secure against counterfeiting threat. The proposed approach yielded a robust steganography achieving very high security with regard to stego-key length than previous approaches. © 2020 IEEE.en_US
dc.language.isoen_USen_US
dc.publisherIEEEen_US
dc.subjectcounterfeiting; DSP; hardware steganographyen_US
dc.titleSecuring IP Cores in CE Systems using Key-driven Hash-chaining based Steganographyen_US
dc.typeArticleen_US
dc.indexedSWCen_US
Appears in Collections:Conference Proceedings_ SCSET

Files in This Item:
File Description SizeFormat 
443-Securing IP Cores in CE.pdf
  Restricted Access
3.09 MBAdobe PDFView/Open Request a copy

Contact admin for Full-Text

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.